>>> Printing information for: portage://sci-electronics/iverilog-12.0-r1


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description : 
   A Verilog simulation and synthesis tool
homepage : 
   https://steveicarus.github.io/iverilog/ https://github.com/steveicarus/iverilog
maintainer : 
   vowstar@gmail.com
   sci-electronics@gentoo.org
   proxy-maint@gentoo.org
license : 
   GPL-2+
eapi : 
   8
slot : 
   0
subslot : 
   [not set]

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iuse : 
   [not set]
required_use : 
   [not set]
keywords : 
   stable(amd64)
   unstable(arm)
   unstable(arm64)
   unstable(ppc)
   unstable(ppc64)
   unstable(riscv)
   unstable(x86)
properties : 
   [not set]
eclasses : 
   gnuconfig
   toolchain-funcs
   libtool
   autotools
defined_phases : 
   install
   prepare
installed : 
   [not set]

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src_uri : 
   iverilog-12.0.tar.gz

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bdepend : 
   dev-util/gperf
   sys-devel/bison
   sys-devel/flex
   sys-devel/gnuconfig
   >=app-portage/elt-patches-20250306
   any 
      >=dev-build/automake-1.19:1.19
      >=dev-build/automake-1.18.1:1.18
   any 
      >=dev-build/autoconf-2.73:2.73
      >=dev-build/autoconf-2.72-r1:2.72
   >=dev-build/libtool-2.4.7-r3

depend : 
   sys-libs/readline:=
   virtual/zlib:=

idepend : 
   [not set]

rdepend : 
   sys-libs/readline:=
   virtual/zlib:=

pdepend : 
   [not set]